1. Field of the Invention
The present invention relates to telecommunication switching and, more specifically, to merging information from a plurality of circuits into a packet or cell and scheduling such a packet or cell for delivery through a packet or cell-based core switching fabric to achieve low and deterministic switching latency.
2. Discussion of Related Art
Traditional telephone networks are “circuit-based,” meaning that the network dedicates resources to form a connection from source (e.g., calling party) to destination (e.g., called party). More specifically, to establish such a circuit-based communication, the network dedicates certain “time slots” or “circuits” within a predefined time division multiplexing (TDM) technique, such as T1: e.g., within T1 there are 24 time segments, called DS0 circuits and within T3 there are 28 time segments called DS1 circuits. (Other standards have other analogous organizations.) By conveying information within the time slots, a connection may be formed that is synchronous and that has known, consistent bandwidth.
Switches are placed throughout the telecommunications network. At switching points, a given circuit on a given link may be “switched” to another circuit on another link. Thus, information may be carried into the switch at a first time slot on a first T1 link, but carried away from the switch on a second time slot on a second T1 link.
One problem with the above approach is that unused timeslots are in effect wasted bandwidth. This unused bandwidth is particularly inefficient in contexts where the switch is being used to carry data (as opposed to voice), which occurs in bursts.
Relatively new methods of communication, such as Asynchronous Transfer Mode (ATM) networks, provide the capability of dynamically distributing bandwidth to connections in a switch. ATM organizes information as cells, each having a header and a payload (as do other cell- and packet-based techniques). Unlike TDM techniques which inherently identify the data by the time slot in which the data is conveyed, ATM (and other cell- or packet-based) techniques identify the data by address information in the cell header. The cell payload is used to carry the data to be transferred.
There are at least three problems with using ATM (or for that matter any other cell-based or packet-based approach) to implement TDM circuit services. First, it takes time (and thus introduces delay) to fill an ATM cell with a full payload of circuit data. For example, if an ATM cell were to hold data for only one DS0 circuit connection, a fill time delay of 5 milliseconds is needed to fill the 48 octets of an ATM cell. Second, extra delay is introduced by queuing cells. With conventional ATM switching techniques, by definition, there is no timing relationship of information in different cells (thus the term asynchronous). Consequently, multiple cells may converge on the same output of a switch (i.e., multiple cells destined to the same output), and thus the cells may need to be queued. Third, inherent timing information is lost in the ATM network, since it is asynchronous. To compensate for this, there are ATM Adaptation Layers (AAL), such as AAL1, that include timing information that can be extracted by the termination point to reestablish the timing reference to the input.